Whether the future GPUs of the future will be made up of multiple chips, chips, working together as one is no secret, but for the time being out of the behind-the-scenes rumors, cross-line claims and product announcements until present in the future In the case of vaporware, we’re missing something with a face and eyes that allows us to get a feel for what a chip-based GPU would be like.
What is the interest for AMD to create GPUs based on chipsets?
Crisps are nothing newAt least in AMD, where we have already seen this approach in some models of its AMD Ryzen architectures, but it is not something that we have seen in GPUs and there are still several handicaps which in terms of performance and architecture still need to be overcome. in particular linked to the interconnection between the different elements.
GPUs are processors whose performance depends on bandwidth rather than latency, in that they are the reverse of processors, but the way to get bandwidth in recent years has been to increase frequency. of memory, taking advantage of the different manufacturing nodes, but it has reached a point where tricks like the GDDR6X’s PAM-4 have to be learned so as not to have to increase the consumption, since voltage and frequency are linked.
The most logical solution left for them is to make the GDDR memory chips of the future no longer have 32 bits of bandwidth in total, but rather 64 bits, but since the interface to the memory is at the edge. , that would widen the perimeter of the GPU, so it makes sense that in order to avoid having a mammoth GPU, it would be impossible to make it in one piece and then make it into chips.
What does AMD’s patent tell us about its chip-based GPUs?
For starters, the AMD patent is surprising in that if you look closely at what it is each of the GPU Chiplets These aren’t Shader Engines or parts of a GPU but rather complete GPUs, but this is where one of the interesting parts of the patent comes in, as most software is designed to use a single GPU.
What was AMD’s solution? Very simple, only the first GPU Chiplet is connected to the CPU, while the other GPU chipsets are subordinate to the first, taking advantage of a new type of TSV type interconnection, where the different chips communicate with each other.
Think of it like a kind of crossfire to various groups, but without the need to manage the different GPUs from the software, because different programs would see the set of GPUs as one instead of several.
The HBX interconnection and its relation to the X3D and TSMC
The most important part of the patent is the HBX interconnections, which are those that communicate the different GPU chiplets, said interconnection is done in the interposer, in the central part and it is a technology that AMD has already mentioned under another name, a type of connection that completely replaces the current Infinity Fabric I’m talking about what AMD called a few months ago as X3D.
The HBX doesn’t just communicate the different GPUs to each other for what is the distribution of the lists of screens but also the L3 cache, this cache that appears in the patent it would not be the Infinity Cache of RDNA 2, because it acts as a last-level cache for the GPU, which a victim cache cannot do, which is important for all GPU chiplets to have a coherent view of memory.
Finally, we do not know what will be NVIDIA’s approach regarding GPUs based on chipsets, Hopper specifying that Intel’s approach with its Intel Xe is different from that of AMD, since that of Intel Xe-HP is not planned. to function as a single GPU from a software point of view.
