Artificial Intelligence is a market in which AMD has long been absent from the market for artificial intelligence processors, which is why the appearance of a patent by AMD where we speak of a processor dedicated to this task is surprisingly, although neither is the first bet they make when you consider cDNA.
GPU and artificial intelligence
Since NVIDIA added its Tensor Cores, which are nothing more than systolic array type ALUs, the use of GPUs for artificial intelligence has grown exponentially and thus opened up new markets for these devices. Of course, in the domestic market, the usefulness of artificial intelligence has certainly been limited to specific utilities such as the suppression of noise during conversations, the elimination of funds for streaming and especially the increase of the real-time resolution.
In AMD’s case, AI has been notable for its absence in its RDNAs, but the CDNA family GPUs, which lack fixed function units for graphics, have systolic arrays in their compute units, so speculation for RDNA 3 would be based on implementing CDNA unit in RDNA 3 compute units, which would give AMD PC GPUs the ability to run algorithms similar to those currently in use, they run NVIDIA Tensor Cores.
Dismantle AMD’s AI Chipset Patent
The patent which has just appeared describes a GPU with 5 differentiated chiplets, composed of a central GPU and 4 chiplets for artificial intelligence, which also fulfill the functionality of last level cache between the central GPU and the external memory, we We are therefore faced with a very complex electronic circuit, which makes us think that this is not a design made for servers, especially data centers.
Each of the chiplets is composed of two parts, on the one hand it can be configured to operate as much as the RAM memory of the processors for artificial intelligence embedded in the chiplet itself, on the other hand it can be configured last. level cache. This allows Chiplets to act as coprocessors to the GPU or to operate independently of the GPU depending on how you configure memory.
Which reminds us of what the AMD Vega can do through the High Bandwidth Cache Controller, where HBM memory goes from final GPU memory to cache to access system RAM and SSD. connected to the PCIe ports of the system, but this would not apply to the central level of the GPU but to each accelerator.
However, this does not mean that we are talking about HBM memory, since the chiplet, apart from memory, has four built-in units which are named “Machine Throttle Units”, which are described as matrix multipliers in the patent. . they are therefore nothing more than systolic arrays, so it is a clear case of an integrated processor in memory.
The patent does not give more details on the four units for artificial intelligence, but since they are units outside the computing units, they cannot share the control unit with the rest of the computing unit. , which means that the chiplet works like a complete processor and that they are not just “tension cores”. In other words, they have their own control unit and therefore each AI chip is an independent processor.
This means that just as the GPU executes a list of graphics and / or computer commands sent by the CPU, it means that chiplets for AI can speed up algorithms for AI without needing to use a GPU with drives. . For the AI for this. Which means that AMD could sell these chips for artificial intelligence in certain markets, in particular the server and data center markets.
Will we see them in the internal market? We doubt that the reason is the extra cost to the user which results in adding an extra chip to the cost equation, so we think the AI in RDNA 3 will instead be with specialized units within. compute units of each GPU, as is currently the case with NVIDIA.
