AMD Unified Last Level Cache, new patent for GPUs

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AMD Unified Last Level Cache, new patent for GPUs

AMD, Cache, GPUs, level, patent, unified

Chipsets are the future of both processors and GPUs, where the problem, as we already know, is the interconnections between them and the resources that AMD, Intel and NVIDIA let share between them. The patent attempts to explain how AMD would launch a cutting edge shared memory resource that in turn would be unified for everyone, a design very similar to what we saw in Zen 3.

A unified, shared and modular architecture: unified top-level cache

AMD-Active-Bridge-Chiplet-Patent-Fig1

In the details this is what is important and although the above explanation sums up Lisa Su’s plan, the truth is that if we take a close look at the patent it leaves open the possibility of a number “N”. “chips. This is important, because it assumes that this new technology will be the cornerstone of a future project which assumes that the number of chips will increase as the nodes allow it.

However, there is a concept that is not fully defined: Primary GPU Chiplet. As seen in the slides, it is the cached data that determines and goes to the “Active Bridge Chiplet” or “Caching Chiplet” hinting that, like in Zen architectures, we would have an I / O die supposedly called Chiplet bridge active.

This is what distributes the tasks of the GPU chips through their memory channels and through the Unified last-level cache. In other words, instead of having independent chipset caches as if they were processor cores with their L1 and L2 cache, AMD with that specific chipset would act as a monolithic cache.

Addressable memory, single top-level cache and logs

AMD-Active-Bridge-Chiplet-Patent-Fig2

The game seems well marked: not to force the programmers to change all their software and their way of working in order to compile the loads with individual chiplets. On the contrary, with it, developers do not have to take into account whether we are talking about 1, 2 or 20 chips, because it is the Chiplet Active Bridge the one responsible for distributing the loads and the work.

Therefore, LLC would be like a sort of L3 in true style. Infinite CacheSo we don’t know if it will maintain or change its function or just take a new approach while retaining its essence.

Either way, AMD is heading into the graphics card market, it now remains to be seen whether we are facing a big blow for data centers and AI, for gaming GPUs, or for both as a fundamental part of chip design within the company.

What we do know from the January patents is that the design is very advanced and although these patents are just diagrams, the work on the design table is done, so it shouldn’t take too long to get started with it. the real tests for those designs, if they’re not already …

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