how heterogeneous processors work

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how heterogeneous processors work

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Although they are used in different devices, for different applications, they run different binaries and there are some points that differentiate them, all SoCs have a common architecture, which affects their performance and their nature as a whole.

What is an SoC?

SoC PS5

Today, each processor is an SoC, but we call SoC those which bring together a CPU and a GPU in the same space, to differentiate them from those SoCs which only serve as central processors or graphics chips which are still called respectively CPUs. and GPU.

SoCs are found in all types of computers today and have the economic advantage of combining several components on a single chip. The reason is that the method not only saves the manufacturing of several chips by simplifying them into one, but also the corresponding tests.

SoCs are nothing more than a product of the continuous integration of components thanks to Moore’s Law, in which the number of components on motherboards was gradually reduced as they were integrated. into each other. Such integration, however, presents a number of tradeoffs that affect its performance and make an SoC-based design less efficient using a separate chip.

General architecture of a SoC

General SoC architecture

No matter what type of SoC we’re talking about, they all have a series of things in common when it comes to their organization. What do we mean by that? Organization or architecture is how the components of a processor are interconnected with each other within an integrated chip.

In SoCs, all elements share a common access to the same memory, this means that in all SoCs, access to memory is done through a single component. What is in all the architectures the Northbridge or North Bridge, which communicates all the components of the CPU between them and with the RAM memory.

Interconnections

The Northbridge doesn’t really run any programs, but it organizes the sending and receiving of data, so internally the SoC processes a large amount of data continuously and is the most important part when designing a SoC.

There is a myth among users that creating an SoC is about gluing the different pieces together. The reality is very different since the interconnection between the components requires the construction of a specific and different intercommunication infrastructure for each SoC.

Architecture in an SoC and memory access

ASCII

In SoCs, all components share access to RAM memory, which poses contention problems. What is a containment problem? It is when the memory demands are so high that it ends up adding more latency than normal and thus making the performance of each element of the SoC worse than with each element having its own type of memory.

The best way to remedy this is to use multiple memory channels at the same time, it is usual for PCs to use two memory channels per SoC, 4 workstations and 8 servers. Each memory channel can be used by a hardware component at the same time, but due to the large number of elements accessing at the same time, this is not enough.

In addition, managing a multi-channel memory interface further complicates the Northbridge and thus increases the size of its SoC. This is why the SoCs for servers have the largest size, not only because of a larger number of cores, but because the larger space for the Northbridge allows them to add more complexity to the interfaces. memory.

Coherent memory versus non-coherent memory

In an SoC, although memory access is unified at the physical level, it is not at the addressing level. When we say that a component of the SoC is consistent in terms of memory, we mean that they all point to the same memory addresses and when a change is made in every part of the RAM memory, the rest of the elements are in it. aware.

Consistency occurs relative to the processor, but there are components in the SoC that can operate without a consistency mechanism. This obliges, with regard to the external memory, a part is assigned to the coherent part and others to the non-coherent parts. When the Northbridge of the SoC receives a request for memory in an SoC that has both types, it splits the memory addressing, so that components consistent with the CPU access part of the memory and others to another part. Memory.

The best way to achieve memory consistency is to add an extra level of cache, which is not in each of the components but in the Northbridge, an element in which they all communicate in common. This method is common among smartphone SoCs and is the easiest to implement to ensure memory consistency.

Thermal drowning in SoCs

Thermal core of SoC architecture

Another problem with SoCs is that the components are very close to each other, which means they can reach cooler temperatures than if they were mounted as separate components. This means that the clock speeds that each component can achieve are lower than separately, which affects performance.

So in an SoC, if you want one component to hit maximum speed, it does so by perjurying the rest of the components. Even on SoCs with multi-core processors, this occurs between different cores, where some designs allow one core to run faster than others.

This is also why many SoCs have the ability to connect and disconnect different parts of the GPU when not in use, but this needs to be implemented in the architecture of the SoC itself and therefore in its design.

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