Everything in this life follows a methodology, especially with a view to developing new products. Which consists of a series of protocols with the aim of achieving a clear result in the shortest possible time. The design of CPUs is no stranger to this and that is why we are going to describe the different steps that are followed when designing a CPU.
If we take a processor from a few years ago and buy it with a new one at first glance, they will look the same, but they don’t, the greater complexity of new designs requires hours of work. much longer and with it a more qualified staff. It is true that each new manufacturing node allows for more transistors to be placed, but it also involves more work and since the development times are unforgiving, it is necessary that the conception of new designs follow a series of orderly steps. .
It all starts with the choice of the manufacturing node
The first step is not made by the engineers, but by the managers, who negotiate multi-million dollar contracts with the various foundries and make the various forecasts regarding the level of production and costs.
The specifications and costs of the manufacturing node will determine for architects what area they have to create the chip, the budget for the number of transistors, and the development times they have to create the new processor designs.
The following is the realization of a diagram
Floorplanning is nothing more than a diagram where we indicate the general basic elements that make up a CPU to order them in a space. With general elements, we’re not talking about putting a CPU core here, cache here, GPU there, etc.
But by this we are referring to much more basic elements such as combinatorial circuits such as a multiplexer, logic gates of different types, ALUs, memory buffers, etc. This is due to the fact that the hardware description languages require that the interconnection between the different elements be specified and it is therefore essential to take a pencil and paper, a huge sheet of paper to interconnect the different elements of a diagram. .
The first diagram created is not the last, but it allows the different modules of a CPU to be organized into two types of blocks:
- The former are called fixed blocks, they include those elements which will not undergo design variations and will remain static in terms of area, due to their nature permitting.
- Multipurpose blocks, on the other hand, are the parts that are going to be changed, especially because the interaction with other parts of the chip requires it or simply because they do not yet know what design is going to be implemented in the final version. .
If there is enough space in the floorplanning design of the processor to improve certain elements, we seek to integrate more advanced solutions for these parts, which are being developed in parallel and which we will see in the next section.
3rd of the design stages of a CPU: definition of the ISA
The next step is to define the set of registers and instructions to use, in the case of CPUs where these are inherited from generation to generation, the implementation may seem easy, but adding new instructions and registers entails the reorganization of something which in itself is quite complex.
In GPUs it’s different, they don’t run programs and each new generation means being able to change the ISA nature of their shader units in more versatile ways. So if it is necessary to delete instructions it can be done, but in a CPU this is not the case, deleting an instruction or a register is to break the compatibility with the software.
These are the parts in charge of data processing that are generally of varying size in the design of any type of processor and those that end up going through this design stage. On the other hand, the fixed functional elements do not receive these modifications.
4th of the design stages of a CPU: tests in FPGAs
No, we haven’t reached the final stage, but we have to prove that the design is functional, for this purpose the FPGA boards are usually connected to each other in a huge matrix. Each of the FPGAs has been programmed or rather configured to behave as part of the overall design of the CPU or GPU that we design.
The idea here is not to go at full speed, but to check in slow motion that the design is functional. So we’re going to have much higher latencies and much lower speeds than the final processor, but what we’re interested in is that everything is working.
5th of the design steps of a CPU: I / O, power supply and clock
The fourth step is already the creation of the chip is to create the final chip, but we end up with the input problem that we must design the energy distribution in the circuit on the one hand and on the other hand that of the clock signals, some of which will come from a master clock which will be subdivided and others will have their own clock.
What you do is take the floor plan we saw in the previous section and surround it with a square or rectangle divided into quadrants. Outside the quadrants, it is assigned a specific energy or I / O function. This is where the perimeter of a chip is designed and the location of the various interfaces for communication with peripherals and memory is marked.
It is at this stage that all the documentation concerning the distribution of electrical energy is also found, in which it is checked whether the design of the various elements makes it possible to achieve the expected clock speeds.
Processor check
After conception comes the verification of the same. In which the finished design is validated by an entirely different team, which looks for any design flaws at the physical level that it may have. The knowledge of the validation team is totally different from that of the design.
Indeed, they affect very different branches and the validation team focuses more on the detection and correction of errors that occur in the physical implementation of a CPU and not in its architecture, which does not change origin. . An equivalent to the world of construction would be that of a group of workers and contractors who prototypes a house or building and detects errors that affect the performance of the final design and which are not visible in the simulation.
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