Although little is known about Zen 5 and the Ryzen, Threadripper and EPYC processors that AMD will launch under this architecture, this does not mean that those of Lisa Su are not working on it, with Zen 4 already in the final stages. From the design point of view, it is normal that the fifth generation architecture is also quite advanced.
AMD EPYC Zen 5 will use socket SP5
The SP5 socket It will be used for the first time by the AMD EPYC based on Zen 4, with Genoa being the first model to be launched with 96 cores and Bergamo in second place with 128 cores. Well the AMD EPYC Turin will also use the same socket.
According to rumors, this processor will have a 600 W of maximum consumption and will therefore use the SP5 type E socket which allows up to 700 W of consumption. From the recently leaked details, we know that this is a CPU socket of the type LGA with 6096 pins. Apparently, the new outlet can reach its maximum consumption for 1 millisecond of time and 440W for a period of 10ms.
Another detail that has been leaked about the new socket and in particular the chipset it will be compatible with is that AMD Zen 4-based server processors will use DDR5-5200 memory interfaces, but the AMD EPYC will increase the speed for DDR5-6400. It is also rumored that we might be seeing the implementation of interfaces for the first time. PCI Express 6.0.
New details on Zen 5 cores
If taking the AMD EPYC Turin It is the same as that of its predecessors as well as that of the EPYC processors based on Zen 3, they use the same as Zen 2 so at first glance the Zen 4 and Zen 5 processors should have the same size and the same amount of Chiplets. CCD in them.
We have more than confirmed that each CCD chip in the Zen 4 architecture will use an 8-core configuration as in the current Zen 3. So we are talking about 12 CCD chip designs for Genoa and its 96 cores and 16 for Bergamo and its figure of 128 hearts.
ZEN5 EPYC should also have two configurations.
192C 384T
256C 512T– Greymon55 (@ greymon55) 28 Oc tober 2021
Of course, this conflicts with the information the insiders just gave, where they talk about designs with twice as many cores, since the Zen 5-based AMD EPYC Turin will have configurations with more cores than those of the fourth generation. : 192 with 384 threads and 256 with 512 threads.
The Zen 5 CCD chips are rumored to be made under TSMC’s 3nm node, which has a density 1.6 times its 5nm node, so by eliminating redundancies, it would be possible to place twice as many cores, but we can forget the interface to communicate the 16 cores, which would be extremely complex, so we should not rule out an intermediate node like N4 or N4P.
Another detail that has been revealed is that Zen 5 will use V-Cache in all of its designs, something that besides we do not know if Zen 4 will implement it as standard as a measure to increase its performance. In any case, there is evidence that increasing the amount of L3 cache significantly increases the IPC. AMD can completely separate the L3 cache from the rest on Zen 5 cores to reduce its size.
Heterogeneous hearts in Zen 5?
What is the other possibility? We know that AMD has published a patent for the use of heterogeneous cores and that it could see the light of day at least in Zen 5. Thus AMD could adopt the same strategy that Intel has just adopted and therefore half of the cores. will be smaller in size. The difference with Intel’s approach? All cores would support multithreading and not just high performance cores, but that’s not something we can confirm.
One thing that excludes this approach is that in the case of the AMD EPYC Turin we are talking about a processor for servers where the use of high energy efficiency cores does not usually occur, in any case the approach of AMD for a hybrid setup does not. must be completely identical to Intel.
