With the NVIDIA data leak in the theft of data for its servers, not only its roadmap in terms of graphics architectures has been revealed, but also the configuration of the RTX 40 GPUs based on the Ada Lovelace architecture that NVIDIA will publish in the course of the year. 2022. How do they compare to the current generation?
Rumors have long claimed that the RTX 40’s Ada Lovelace architecture was initially known as Ampere 2.0 and that would be a very similar move to what NVIDIA made with the GTX 900 and GTX 1000, where they moved Maxwell 28nm Bulk to 16nm FinFET architecture, they added some minor improvements and more cores in the process. In this case, it would be the transfer from Samsung’s 8nm node to TSMC’s 5nm node.
NVIDIA RTX 40 GPU Setup
It turns out that information has been leaked about the number of SMs, that’s what NVIDIA calls its shader units or the actual GPU cores, which have the various configurations of the Ada Lovelace architecture. Let’s not forget that NVIDIA also calls the FP32 units inside the CUDA cores of the SMs.
The summary information is as follows:
- The AD102 chip has a total of 144 SM (18,432 CUDA clouds)which is a significant jump from the 84 SM of the RTX 3090 Ti.
- In second place we have AD103 with 84 SM (10,752 CUDA clouds)just the same number as the current GA102 of the RTX 30. From what we deduce it is a conversion of the said 5nm chip from TSMC.
- In the case of the AD104, we have a configuration of 60 SM (7,680 CUDA clouds)12 more than the current GA104.
- AD106 has a setting of 36 SM (4,608 CUDA clouds). The current GA106 has a setting of 30.
- The most modest chip would be the AD107 with 24 SM (307 CUDA clouds). Thus, in the lower part of the table, there are also improvements with 4 additional SMs.
How do we interpret the data?
Let’s not forget that NVIDIA GPUs are a kind of Matroska in which 2 SMs are part of a TPC.
And up to 6 TPCs are part of what we call a GPC.
If the architects working for Jensen Huang have retained their previous two generation structures in the RTX 40, which we don’t know about, then the RTX 40 configuration for how many GPCs we’ll have would be next in ascending order of power :
- AD107 or RTX 4050: 2 GPCs and a potential 128-bit GDDR6 bus.
- AD106 or RTX 4060: 3 GPCs and a potential 192-bit GDDR6 bus.
- AD104 or RTX 4070: 5 GPCs and a potential 256-bit GDDR6 bus.
- AD103 or RTX 4080: 7 GPCs and high-speed 320-bit or 384-bit GDDR6 bus capability.
- AD102 or RTX 4090: 12 GPCs and a 384-bit or 512-bit bus potential of very high-speed GDDR6.
Farewell GDDR6X in the next generation of NVIDIA?
Not too long ago, RAM manufacturers introduced their GDDR6 at 20 and 24 Gbps, which puts them at the same bandwidth as GDDR6X. Of course, with a considerable increase in consumption in the process due to the increase in voltage to reach 20 Gbps and 24 Gbps for transfers, but gaining the capacity to have 2 GB capacity chips.
We don’t know if NVIDIA will use the 600W connector, but we can be sure that it will use the 450W one, since it has already used it in its RTX 3090 Ti. Configuring 12 GPC with 144 SM inside requires huge bandwidth, despite the fact that a 384-bit configuration is the one with the most digits, from here we expect you don’t rule out the increase in consumption margins due to the new connector a configuration for the most powerful RTX 40 512 bits.
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