It’s no secret that AMD will take great advantage of its vertical cache technology in the future. We’ve seen it before in the EPYC Milan-X processors for servers and the Ryzen 7 5800X3D for PCs. However, the plans could go further and we could speak of a possible Cached L4 and AI in the future AMD Ryzen
The cache memory of a processor has a clear function, to speed up the execution of instructions. However, it may not be slower to fetch data than RAM. Thus, the point is reached where adding additional cache levels is counterproductive and does not lead to better performance. The reason for this is that the levels are not continuous and additional access must be performed for each of the levels until reaching system memory.
However, the arrival of DDR5 memory and its higher access latency opens a window of opportunity for one more level in the hierarchy. Which in the case of AMD Ryzen desktops would not be located in the CCD chiplets, but much further. Specifically in the built-in memory controller. What is an L4 cache in AMD processors. EPYC, Threadripper and Ryzen.
How do we know that future AMD processors will have an L4 cache?
The answer to the question is simple, neither more nor less than a patent. And it is that AMD intends to respond to one of the capabilities that Intel currently has. We are referring to the XMX units of the Intel Core 12 and Sapphire Rapids based Xeons. That is, the unit of systolic chart type or tensor unit to calculate charts. In other words: to speed up AI algorithms so they run more smoothly on the CPU.
To do this, AMD has created a new IOD unit, which is distinguished by the sacrifice of certain ports for the various processors in exchange for the integration of a unit to accelerate Machine Learning algorithms. So we are faced with AMD’s response to the inclusion of the XMX unit in its biggest rival’s latest processors. The grace of this is that Intel has chosen to have some of its Xeon Sapphire Rapids use HBM memory. In the case of AMD, the solution is simpler. The use of it V-Cache which is added to the processor for AI to accelerate said algorithmsyes Although in this case as an L4 cache. A level never before seen in Zen architecture processors.
for now andIt’s no longer a patent, but this will probably result in a new CPU variant. It is in any case a market in which AMD is the least interested. Although rumors claim that said unit could actually be a Embedded FPGA in Xilinx eFPGA. About this we will leave doubts when the time comes.
