ArM architecture has a few interesting features from the design point of view and that, like a good RISC, when faced with questions such as SMT or HT implementation or similar in its fields the answer is very similar to what we would get. .
ARM SMT: high performance at very high cost
We will not find out now what SMT strategies can be done, but the truth is that no one can reduce the impact that can be made in terms of consumption and temperature. There are ARM processors with this feature, but they are designed for high performance such as servers.
The problem is that increasing the number of threads means a series of improvements and adjustments so that the increase in performance is achieved, regardless of the use and programmed temperature as high.
ARM is supported great.LITTLE too much and this means that including SMT should mean increased storage L1D, L1I and L2 (at least), where the measurement and measurement of available and efficient sources can also mean a large L3. It should also be noted that when the physical core releases two threads of execution with specific commands and shared services, the performance of each thread is greatly reduced, not 100% of the main thread, but performance is divided.
When we add to this the great use of power due to the increase in the resources used and produced, we find that, as a general rule, great.LITTLE in ARM works better with simple features without using logic to maintain high efficiency.
Focus is key
The advantage of ARM with big.LITTLE is precisely its per watt performance, until Intel in 2020 introduces its design and parallel design of IoT devices, as it cannot compete directly with existing systems for efficiency.
Therefore, the architecture and processor are important in understanding why almost no manufacturer uses multiple threads in their CPUs, since most of them are focused on smartphones and low-power devices.
In addition, to what manufacturers like Qualcomm assures, this method will be maintained for many years in this field, where lithograph processes will mark the future of this structure at a much larger scale than in fields such as packets or servers.
