It's funny how decision-making about a strategy can mark the global market. Both TSMC and Intel and Samsung will also fight for the best modern lithographic process with a near future of 3 nm and 5 nm respectively. But beyond mass, the way to go to reduce the size of transistors will bring the line to their implementation.
For Samsung MBCFET, its 3nm will introduce a new generation of GAA transistors
FinFET is a widely used technology and expiry date. The big three know it and Samsung is the first to have a new generation technology that promises benefits that are truly hard to believe today.
This technology is included within what Samsung has revealed as Multi-Bridge Channel FET or MBCFET and will integrate as if it is a great start to new transistors Gate-All-Around or also known as GAA.
These new transistors are formed as nanoscale and are known for their incorporation as Nanosheet either The Nanoblades the way in which these items are allowed to measure, which returns a certain proportion of traditional deputies. The bottom is in a vertical position, said Nanosheet in a position that is not the same as the folios in the printer's pocket.
This system gets the highest value per battery and allows to overcome the current problems with FinFET and its high performance, something TSMC and Intel win temporarily but with limited hours for obvious reasons.
Benefits of Samsung MBCFET technology
Samsung counts three benefits in terms of properties and three benefits in terms of technology. The first is that MBCFET doesn't need extra space with its Nanosheets to improve speed, since it can be mounted vertically instead of adding as many wings as current FinFET technology does.
The second advantage is that Samsung was based on the traditional FinFET process in its creation. This has a clear benefit for designers, as they may be able to replace FinFET projects with MBCFET without changing the footprint.
Finally, and in terms of this second benefit, MBCFET is compatible with (and actually shares with) the same process tools and production method as FinFET, so the cost to your industry is minimal and implementation will be very fast. The question then, given its merits, is simple, where does all this improvement come from in comparison to FinFET vs MBCFET?
Through the same lithographic process (3 nm in this case) Samsung offers a number of clear MBCFET improvements: -50% energy efficiency, + 30% efficiency improvement and -45% area reduction. The most robust figures will undoubtedly mark the front and back of the chips they use, as was the case with FFFFET at the time.
In a sense, this technology will begin to be massively produced in the company's 3nm launching in 2021, where by 2022 the time will reach the market and where both TSMC and Intel will have to compete.
The first one will be 3nm based on FinFET, while Intel is not known for its 5nm EU. It would be nice to see who takes the cat out of the water to fight it so that there is no problem and poor site performance, but reduced space and energy consumption as well.
