- And performance per watt improved and significant generational, as well as an improvement in frequencies.
- An augmentation of IPC on the 8% and 10%.
- And 15% improvement in single thread.
- up to one 125% higher bandwidth per core.
- Inclusion of ISA for AI and AVX-512.
But the data does not stop there, since when AMD spoke about performance per watt, it did so with very precise data: +25%which results in an overall performance improvement of no less than one 35% always compared to Zen 3, i.e. Ryzen 5000. The comparison was made on the basis of a CPU of 16 cores and 32 threadswhich we believe will be top of the line again.
The remarkable thing here is that the IPC is lower than expected, but the performance increase in ST on the other hand is as expected, while the general increase in 35% it’s impressive. To say that AMD is “branding an Intel” is like saying that the improvements to the architecture aren’t too big and that performance is going to be hit in large part by the incredible frequency boost we’re about to see. Because AMD will increase between 700MHz and 1GHz
On the other hand, AMD hasn’t explained how many versions of Zen 4 will hit the desktop as such, although we assume there will be at least two: Zen 4 and Zen 4 3D V-Cache. , but Zen 4C? It is rumored that this version is focused on higher core count and lower frequency and therefore requires a denser node in terms of transistors.
Is it AMD’s game with the 4nm? It is possible that Zen 4 and Zen 4 3D virtual cache are launched in 5nm and either ZEN 4C one who reaches those 4nmmaybe for OEM or professional systems that don’t want to spend more on servers, or maybe we’re up against the new generation of HEDT processors that will now be included in the consumer lineup in this way, who knows.
AMD Zen 5, few details, but interesting
As for Zen 5, AMD only unveiled three key sections, which, on the other hand, don’t really tell us much. And it is that following the policy of secrecy already typical of the red team, the three points commented on by Mark Papermaster leave room for optimism:
- Improved performance and efficiency.
- Pipeline frontal reimagined.
- Built-in optimizations for AI and Machine Learning.
What we can say about Zen 5 apart from what has been said is that it will also come in three different flavors: Zen 5, Zen 5 3D V-Cache and Zen 5Cwhere in any case they will debut with the 4nm lithographic process and may scale up to 3nm, where there should be a change.
It’s curious, because Zen 4 makes the jump to 5nm, which means interesting improvements in terms of density, frequencies and consumption, to then move to 4nm, which is an improvement and an evolution of these , while Zen 5 will do it on the contrary: opt for the already mature 4nm and you will find yourself in a more advanced lithographic process such as the 3nm
We understand that this is concentrated in this way by time and volume of production given the delays of TSMC and surely of the few wafers that it will have by 2024, where it seems that AMD does not want to take its fingers by betting everything on the 3nm Departure. As for the performance that can be expected from Zen 5, little is said about it and even if, as we see, AMD has not collected information, the reality is that this architecture has experienced exclusive and parallel development since the presentation of Zen 3.
The changes introduced speak, according to rumors and the few pearls that AMD has left, of the company’s first heterogeneous architecture, something similar to what we saw with Intel Alder Lake, except with the chiplets. It’s the opposite path to its rival, since Intel started with the architecture and then added chiplets, while AMD did the exact opposite.
Thus, Zen 5 will be the meeting point in competition for even cards between the two companies, and therefore the design of Zen 5 has been more exclusive.
Infinite Architecture
As we can see, this is all quite brief and a bit general, but it is part of a whole, which AMD has called Infinity Architecture, where Zen 5 fully enters into an overall ecosystem that will be united by the Infinity cache to make a whole between different types of products.
AMD claims that with this it would already be its 4th generation, including the first as the one that included RDNA or Ryzen at the time. What will be achieved is a unified system that will integrate 2.5D and 3D chiplets manufactured by TSMC where there will be unified consistent shared memory. On the other hand, and taking advantage of the acquisition of Xilinx, the company’s extensions and other IPs will be integrated, at the same time as CXL 2.0 based on memory by desegregation.
Likewise, there will be products within this Infinity Architecture that will enable an extensible architecture for standards CXL 3.0 and UCIE. What AMD is trying to explain here is that connecting it through chiplets and using them will be key to lower latency, greater consistency and lower power requirements through the use of these chiplets in different ways .
Or in other words, there will be scalable and different products that will only change some chiplets for others, depending on the needs of the customer or the market segment.
