An ISA is nothing more than the language understood by the different processors and therefore marks the meaning of the set of ones and zeros in the code they execute. The binary for an x86 CPU does not have the same meaning as the binary for an ARM CPU for example.
However, the advancement of technology makes it necessary to add new instructions to ISAs, which gives them the possibility of adding new features to increase their performance, security when processing data or to face new challenges. presented to them.
In this article, we are going to talk about the ninth generation of the ISA ARM, which after years targeting low-power processors and microcontrollers have decided to be more ambitious and enter the market that requires the most performance. high performance, data centers and high performance. IT or HPC.
Scalable Vector Extensions 2
The Japanese Fujitsu has created for its ARM core a series of proprietary extensions called SVE, which stands for Scalable Vector Extensions. From the name, you might have guessed that we are talking about a set of SIMD instructions. Let’s not forget that in processors with ISA ARM for years, Neon instructions have been used. Which will be replaced by the SVE2 instructions in ARMv9.
SVE was created by Fujitsu for its Fugaku supercomputer, which uses its A64-FX cores. Intend? Take advantage of the data parallelism required by scientific computing, which uses higher precision numbers. This results in much larger SIMD units and therefore more bits.
Since ARM’s interest is to bring their cores to the high performance computing and server market, they decided to adopt SVE and merge it with Neon to create SVE2. The biggest advantage that SVE adds to Neon? These are size independent instructions, so it is not necessary to have a version of each instruction for different sizes as is the case with AVX instructions on x86.
Memory domains in ARMv9
An interesting concept that the ISA ARMv9 adds to the equation is the concept of realms, which is being able to participate in addressing memory and making sure that the code that is executed there does not affect the rest of the memory. system, so it is completely isolated. This is ide al for the implementation of virtual machines where one operating system is running at the same time as another on the same CPU.
Normally, processors have different privilege levels, but with the concept of domain which was added in ARMv9, it will be possible to more easily run virtual machines running on a processor with ARM ISA, but the advantages of this is not only limited to virtual machines, but can also be used in specific applications.
Thus, ARMv9 appears to be an extension of the ISA better prepared for data centers and other types of computers where virtualization and security are much more important than other features. Unsurprisingly, ARM is waging a war against Intel and AMD in the server CPU market, where x86 processors have so far dominated the market.
Memory tagging extensions
They are not new to ARMv9, but rather to version 8.5. His utility ? It is a mechanism responsible for keeping track of all illegal memory accesses made by programs. Illegal access is nothing more than accessing a memory address that the program does not have permission to access. What’s the point ? Because it is used to prevent what is known as buffer overflow, a security issue common to all processors that occurs when the amount of copied data exceeds the memory pool, writing unexpected code to neighboring memory addresses.
If the memory overflow is successful, the original code will be replaced with a new code in memory, which will be executed by the CPU as soon as it reaches memory. It is therefore important to avoid this, especially if we are talking about data centers that tend to serve millions of users at the same time and where a buffer overflow can be used to steal compromised user data.
The MTE is not part of the ISA itself, but is a mechanism implemented in the Northbridge of ARMv9 CPUs that tracks all memory accesses and whose functionality is to transparently avoid memory overflows.
ARMv9 only for data centers and servers?
The new features of ISA ARMv9 that we have described in the previous sections have a marked specific character and have nothing to do with use in conventional devices in which ISA ARM is usually seen. Of all, it calls out the SVE powerfully, because one of the reasons you usually don’t see large SIMDs in processors for PostPC devices is the huge power consumption that their use implies.
At the moment, the only two cores announced by ARM are two from the Neoverse family. On the one hand the NeoVerse V1 under the code name “Zeus” and on the other the Neoverse N2 under the code name “Perseus”. You will not see cores in a future smartphone, but in data centers and high performance computing servers from companies like Amazon AWS, Oracle, Tencent, Google, etc.
ARM has yet to announce a kernel for PostPC devices such as smartphones and tablets. While we can’t forget that ARM’s goal is to supplant x86 in various markets, not only on servers, but also on the PC. The purchase by NVIDIA and its great influence in the PC video game market could lead to the arrival of gaming PCs with ARM and NVIDIA GPUs, although this is a future that will require a lot of support from game developers. video and not from NVIDIA-ARM. himself.
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