To understand these two types of memory, market needs must be considered, because each focuses on different objectives. Therefore, basic concepts are important to start understanding their understanding of differences in terms of function and symptoms.
The three categories specified by JEDEC for each type of memory
JEDEC determines three major fields to deal with when talking about RAM:
- DDR (standard)
- DDR (mobile)
- DDR drawings
The last one focuses on graphics cards and maintains its own values that do not match the two remaining interests. Therefore Normal DDR as we know on PC, it is meant for use on servers, factories, consumer products and in some cases, laptops.
They are usually remembered for larger size, with larger channels available, larger bandwidths, higher voltage and storage speeds and they get higher amplitude per module.
In this group they go from SDRAM to the last DDR5 to see the light, definitely passing through the named DDR4.
The Portable DDR, as defined by JEDEC, and is a widespread memory in the market, because it comes from laptops, cars, phones or smartphones in AIO systems. Its features are quite different than its standard competitors: lower bandwidth, less torque and lower speed, but at the same time they also require very little voltage, which makes them ready for equipment when use is important.
Difference between DDR4 and LPDDR4
For all that being said there are two important things that blossom the absolute difference between these two types of memory: Its topology and PLL support.
As far as blogging is concerned, it's pretty easy to understand, since DDR4 memories come in a DIMM format, while LPDDR4s are mostly offered in PoP and MCP format such as Point to Point.
The main difference comes from the support of PLL (Class Key Keys), because this technology accomplishes three important features that mark before and after DDR4 and LPDDR4:
- Increase the frequency of working of the memory system.
- Increase DRAM performance.
- It improves DRAM performance and lowers production costs.
Synchronized systems use a clock signal as a time reference so that data is transmitted and received in a known relationship with this reference. Another difficulty to keep in this relationship is that the process, voltage difference and temperature can change the time relation between the clock and data signals, leading to a reduction in time.
This problem complicates them as speed increases, which limits the ability of systems to communicate data at high speeds.
As the process, voltage and temperature vary, the output timing and output control, causing the valid data window to change. To transmit and receive data at high speed, it is necessary to address this time difference, a significant difference found in comparison with LPDDR4.
PLL, the main difference between these two types of memory
Category Key Stakes (PLL) It is designed to maintain a fixed-time relationship between the signals in places where the process, the power of temperature and temperature variations, causes these relationships to change over time. PLL works by constantly comparing the relationships between the two symbols and providing feedback on repairing and maintaining structured relationships between them.
This important launch resulted in a faster display speed, compared to other DRAM technologies and created by Rambus.
An important element of the DLL is the phase detector, which detects phase difference between the clock and output data. The phase detector detects this phase difference and sends control information through the step filter under a variable delay line that adjusts the internal clock time to maintain the desired time relation.
DLL-free LPDDR4 works less because of high-speed access problems, because even though JEDEC sets lower performance levels, DDR4 memory is currently at higher operating speeds and speeds than LPDDR4.
