New PCI Express data for disaggregated chips: the UCIe

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New PCI Express data for disaggregated chips: the UCIe

chips, data, disaggregated, Express, PCI, UCIe

Due to the increased costs brought by new chip manufacturing technologies, it is necessary to separate a chip into several different chips. This allows cheaper manufacturing to be used in parts of the processor. However, these interfaces need to communicate with each other and until relatively recently there was no standard for this. A few weeks ago the UCIe or Universal Chiplet Interconnect Express was introduced for this. This will allow multiple different chips to exist in the same package. Well, Intel has released some new information about the standard.

The UCIe is a standard that was presented last March. It is an interface to communicate with each other what we call chiplets and which has the support of companies such as Intel, TSMC, ARM, Qualcomm, Samsung and Microsoft. So we are faced with a standard that we will see in many systems in the future. Well, we got to know some new details about it

What is the USI?

To understand what this interface means, you have to think that it is very similar to PCI Express. In the present case, the difference is that in this case it is not a question of connecting graphics cards, ifdo not chip on the same substrate or interposer. Thus allowing different chips with different functions and nature to be under the same package. Until now, the only processor of this nature was AMD’s Ryzen, which uses the Infinity Fabric interface. Which, despite being a version that supports HyperTransport Memory Coherence, is still owned by AMD. Therefore, a standard was needed that would allow chiplets with technologies from multiple brands and not just one.

Well, Intel has given new information about the first generation of this standard. Who will have the capacity to transmit between 12 and 16 gigabits per second of information per contact pin. So we’re talking now about bandwidth equivalent to PCI Express 4.0. However, with the use of much shorter wiring. What significant reduction in energy consumption, between 10 and 20 times. However, this is not the main advantage of the new UCIe standard.

The other advantage is that it will be possible to place under the same common substrate chips of different brands. Like an Intel processor and NVIDIA graphics. To have everything under the same package. Although not standard, it opens up the ability for custom processors for some specific solutions. Moreover, the UCIe is not a solution centered on a single chipmaker. As it is compatible with the solutions of Intel EMIB there TSMC CoWoS.

Support for consistent memory mechanisms

In addition, the UCIe will have Compute Express Link support and the Consistent hub interface. This will allow the creation of heterogeneous systems, but totally coherent in terms of memory. This is crucial, as it will allow the use of a single RAM pool for the entire system. Which is prevalent in today’s embedded systems and especially in low-cost, low-power solutions where different components share the same memory pool.

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