Most processors today are extremely complex pieces made up of others, but in general they all tend to have a central communication which is responsible for communicating the various elements that are part of the processor. However, there are different topologies in what we call Northbridge and that is why we are going to list them and explain the most used in the different processors in our system, be it CPUs, APUs and even GPUs. .
Shared bus infrastructure
The first type of topology we need to consider is what is known as the Shared Bus Infrastructure or Shared Bus Fabric. These types of interfaces have high speed and are used to communicate the different cores with each other and their caches. But it is also responsible for giving external access to the cores of the CPU and therefore allowing access to memory and peripherals in a consistent manner.
This means that the shared bus infrastructure must have a series of built-in mechanisms to ensure consistency with the memory of the components within the processor. Here it should be noted that we can see that a CPU and a GPU do not share the same addressing, so they will not be consistent with each other, but internally of the same processor, it is normal that all the components are consistent or the maximum possible consistency. Although in APUs this is usually not achieved.
The shared bus infrastructure is therefore what is called the Northbridge or North Bridge, which have different types of topologies. This should be understood as how the different components communicate with each other, which will affect latency, cost of implementation, power consumption, and other factors.
Often times there are designs that do not have the best kind of infrastructure to get the most out of their processors, but it was chosen for reasons of associated cost or because of the number of transistors needed to put it into operation. work and due to the costs such as energy transmitted to communicate or emitted as temperature.
El crossbar switch
A crossbar switch is the easiest type of topology to visualize. It is a type of mesh interface where each of the components has a direct connection with the rest of the components in the system. For example, if we have a processor with 4 components inside, we will have a 4 x 4 unit Crossbar switch.
This is the most common type of topology and the biggest advantage is that it allows multiple communications to be carried out in parallel. Its biggest drawback? As we have more and more components connected to the Crossbar Switch, more and more size is taking that inside the chip, causing the central communication infrastructure to grow more and more and the time is reached where the movement of data ends up taking up more space than the processing of information.
This is why Crossbar Switches although being the most used are not the only type of topology that can be found within a processor, their enormous complexity forces designers to adopt other types of topologies.
Ring topology
The second type of topology are the rings, to understand how they work we have to make a comparison with reality, like the radial highways that exist in some cities. Each exit to a neighborhood or district of the radial highway in our processor is an input and output of data to a component in the processor and the vehicles traveling are requests for data to and from those same components.
In the ring infrastructure, data flows around the central ring. The communication is therefore not direct and the data leaves the ring only when it passes in front of the determined component. An automated system in the ring extracts the data and instruction packets to said component and circulates the rest. The problem with this type of topology is the speed at which data travels. Typically, for each cycle of the shared bus infrastructure, a ring subsection is advanced, so the number of subsections in a ring will match the number of components, making it difficult to scaling to create designs with more or less components. .
Rings are the simplest type of infrastructure to implement on a processor and also the cheapest to implement in terms of costs. But in an infrastructure of this type, each node is only connected to its 2 closest neighbors, one per address. This means that communication with more distant components will have higher latency.
Toroidal topology
Toroidal infrastructures are widely used in the world of supercomputing to connect in the fastest and most efficient way the different processors distributed in the different blades around the infrastructure in the most efficient way possible. Although they have reached their greatest popularity in recent years, it is in the face of processors designed to speed up artificial intelligence algorithms. Either at the level of the communication of several ALUs between them or of different processors.
At first glance this may make you think of a Crossbar Switch, but in the case of a 2-dimensional toroid a component can communicate with 4 other components at the same time instead of 2 compared to a ring and if we are talking about a 3 toroid dimensions then we have that each component will have communication with 6 other components. To visualize it, keep in mind that each dimension of a toroidal topology allows communication with a different component, one for each dimension. Thus, in a simplified manner, a ring is a one-dimensional toroidal infrastructure.
Tree topology
The tree topology communicates the components in an organized hierarchical infrastructure, so that in order to access a component it is necessary to communicate with the one upstream of the hierarchy. This is a very similar concept to toroidal topology and as such it has very low latency when the components are close to each other. Therefore, the latency will depend on the number of levels that a component is in relative to another within the hierarchy.
The organization of a tree topology does not need to have a fixed number of nodes in each of its levels and can be totally irregular in this aspect from one level of the hierarchy to another. So in this aspect, it has greater versatility than the toroidal topology that we discussed in the previous section.
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