It’s been over a decade since AMD launched its first APUs based on integrating low-end gaming GPUs into the processor, a path Intel has also followed today. But the gaming market is not only based on enthusiasts who leave a month’s salary in the gaming market, but also on consumers who would like to have a built-in PC powerful enough to play the latest games without a hitch.
For this type of audience, high-performance APUs, with power similar to that of next-gen consoles like the PlayStation 5 and Xbox Series X would be ideal and it’s an untapped market. So how is it that Intel and especially AMD do not exploit it?
It would take a very complex intercom
If we are talking about a more or less simple APU then we find that communicating its components is not difficult. But if we want to develop a much more complex APU with an integrated GPU equivalent to a mid-range PC, a greater number of CPU cores and a greater bandwidth, then internal communication becomes something much more complex, enough for a simple change delays a design for several months from its launch.
A powerful APU would be similar to what we see on consolesBut the consoles only compete with each other and they’re not in the middle of PC APU product cycles where releases are almost annual. A console is launched when the manufacturer of the same is ready to do so, instead eThe lag of a high performance APU on PC can become on a product that does not meet expectations and accumulates as unsold.
When designing the organization of a future processor, the distribution of different components should be taken into account. This means that the intercom must be designed from scratch on the chip. The problem? The simple fact of having to rearrange the components, eliminating some, and adding others forces you to go back to the design board due to the change in the wiring organization.
NoCs as the basis for high performance APUs
Right now we are in the middle of the transition to NoCs, the recently introduced IPU by Intel clearly shows where things are going to go in future designs. But we also have Xilinx technology recently acquired by Intel and NVIDIA DPUs based on Mellanox technology.
But what do the NoCs paint in all of this? Basically, NoCs by their nature completely eliminate the need for direct communication between components. Since these communicate directly with the SmartNIC which is located in the central part of the chip via a central infrastructure. Because the communication is done via the SmartNIC, the organization of the different components can be completely free and the modifications of it can be executed more quickly, even the designers can add and remove elements without problem.
The NoC will give the possibility to see integrated midrange graphics like APUs and therefore more complex configurations in this regard. The entry-level lineup is already supported by integrated GPUs, so the next step is to bring in low-end and even mid-range gaming GPUs if possible.
