With the RX 7900 fresh out of the oven and the rest of the graphics cards with RDNA 3 GPUs still in the works, it’s too early to talk about RDNA 4. We know that there is already “information” on the net that with the eagerness of visits “they filter” information that turns out to be false. At the moment we are talking about an architecture that is not even finished and therefore continues to be developed within the Radeon Technology Group laboratories. However, this will not be used to introduce you to the development stages of a graphical architecture.
AMD will have to improve the voltage-frequency curve
One of the challenges AMD has faced from generation to generation is increasing the efficiency of its GPUs through so-called performance per watt. However, since consumption does not increase linearly, but rather as a logarithmic curve, this is tricky. In other words, the performances are not the same at all powers. So the manufacturer usually takes the segment of information that interests him and shows it to you. They’re not lying, but they’re not reliable information either.
What we have to take into account is that right now, despite the fact that the RTX 4090 has a much higher overall power consumption, it has a much better voltage and clock speed curve than that of the RX 7900 XTX. This is one of the talking points, since it will not only allow AMD to make RDNA 4 achieve higher clock speeds, but it will also leave more headroom to be able to install video memories. much faster.
When a manufacturer tells you that one architecture is more efficient than another, it means that it really improves the relationship between voltage and frequency. In other words, get more clock speed for less power or maintain the MHz, but with less voltage. In this way, higher performance is obtained, even if the number of disks does not increase.
Using the new 12VHPWR connector
AMD’s goal for RDNA 4 would be to at least match the voltage to the clock speed corresponding to the RTX 4090. Especially since, by 2024, the 12VHPWR connector will already have become commonplace in many food places. This will be essential in order not to be left behind by an NVIDIA that will use said connection.
On which node will the GPUs with RDNA 4 architecture be manufactured?
As of today, we officially have an AMD roadmap as the only official information. The only thing we know? The use of a more advanced TSMC node for its manufacture than the 5nm one, which suggests that we could expect to see the next generation of AMD graphics cards under 3nm, but it could also be that they are betting on the same node as NVIDIA today. That is to say, the 4 nm one, which is compatible in its design with the 5 nm one and would greatly facilitate their task when launching a new architecture.
On the other hand, we have the current economic situation, which has slowed down sales and with it the marketing of the various graphic architectures. AMD can’t afford to have multiple generations competing with each other. Thus, the launch date of RDNA 4 is late 2024. If we count that last year is used to complete the design of the chip. So we are left with a clear situation, it is absurd to talk about final technical specifications, since they may undergo modifications. Precisely, the “leaks” of information have already been noticed with the RX 7000 and the last minute changes that AMD made in response to the increase in wafer prices.
AMD can’t use TSMC’s 3nm node
The reason for this is that although the N3 node is much more advanced, its costs are so high that it nearly eliminates the benefits of higher density. Thus, AMD is talking about a more advanced node, since they could bet perfectly on the N4 variant, which is compatible with the one they currently use and also has a much lower manufacturing cost.
However, we need to clarify what we are basing for such a statement and that is the fact that we will see Zen 5 in both N4 and N3 nodes. The reason for this is that they will seek not to manufacture large chips in said node. The most certain thing is that only the CCX of the processor where the cores and the cache are located. However, on larger chips such as laptop CPUs which tend to be monolithic and RDNA 4 GPUs might pull the 4nm node for this purpose.
We will see more chiplets in RDNA 4
One of the things that the rumors talk about that I agree with is that AMD is going to add more chips. Moreover, it will split the GCD core into several smaller chips. What are we basing it on? In a recently published AMD patent titled DIE STACKING FOR MODULAR PARALLEL PROCESSORS. However, the existence of this patent does not guarantee anything for the RDNA 4, it could perfectly apply to the CDNA or be faced with a much more distant architecture.
What does the patent tell us?
What interests us at this point is the separation of the GCD into two parts called SED (Shader Engine Dies) and CP (Command Processor), which would be in the chip that is in the base and would not be a chiplet above that. . Look at the amount of SED on the 602a base that would be the interposer
In a GPU, the command processor is located in the central part and is in charge of distributing the tasks between the different clusters or sets of shader units or cores. However, for communication, it is a problem if it is distributed between several chiplets, in particular with regard to the wiring if one uses traditional interfaces, from there to move it to the interposer or the base for a greater diffusion and lower cost.
At the same time, this allows the central chip to be broken down into several much smaller and more symmetrical chips. Which are cheaper to make and AMD doesn’t have to make different chips for different configurations. In the RX 7000, we will see that there will be different GCD configurations, but the SED chips will still be the same in different numbers in the RDNA 4 based RX 8000.
The other chiplets, potential evolutions of the MCD
The MCDs have the task of communicating with the video memory, however, and to continue with the patent, the chip that serves as the basis is not only designed to carry out the communication between the various chiplets, but also all the work of interaction with the memory, whether it’s GDDR7 or any other standard, it would be transferred to what we call the interposer. Therefore, the cache is mentioned in the diagram as a separate element. That is, the Infinity Cache will continue to exist, but it won’t be the MCD we know, but rather all of the high-density SRAM memory and the ability to be used as a last-level cache.
What do we see more realistic for the future of AMD GPUs?
Leaving aside the patent, which we will repeat it has no reason to be related to RDNA 4 and could relate to its family of cards for calculation in supercomputers. We think what AMD is going to focus on for RDNA 4 will be fixing the issues with RDNA 3. Notably in its voltage and frequency curve, which has room for improvement, since to achieve the same results in games than an RTX 4080.
Unsurprisingly, if we look at how many points the RX 7900 XTX gets per watt, in benchmarks like FireStrike Ultra, we’ll see it stays at 52 points per watt, with no clock speed changes or undervoltage no more. However, if we do the classic voltage drop exercise, then the RTX 4080 can reach 77 points per watt and the RX 7900 XTX remains at 58. So at the beginning of the article we told you that one of points that AMD will play in RDNA 4 will be precisely that and it is not a minor change, but something that requires a complete redesign of the entire chip, from the first to the last transistor.
This doesn’t mean that some system units are going to stay the same, and we could be wrong, but we don’t think RDNA 4 will be much different from RDNA 3 in the sense that we will continue to have a large GCD as the core element. Of course, with improvements in the units for Ray Tracing, one of the weak points of the current architecture, and with the possibility of obtaining higher results in certain consumptions. In other words, we don’t see AMD building a complex chip out of multiple chiplets.
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