DDR5 memory is a new standard for RAM that not only increases the bandwidth and capacity of RAM, but is the first DDR memory to use two memory channels instead of one. It replaces DDR4 and can achieve higher clock speeds than DDR4. But can DDR5 reach 10 GHz of speed?
10 GHz DDR5, is it possible?
The claim comes from Netac, a Chinese company that claims to develop DDR5 memory modules that outperform anything on the market. Chinese media claim that Netac started the development of DDR5 memory that exceeds 10 GHz
JEDEC’s current DDR5 specifications speak of a clock speed between 4.8 GHz and 8.4 GHz. While revisions to these standards are always welcome, different motherboard and processor manufacturers try to con form to this standard as much as possible. DDR5 would not cease to be for now, and until JEDEC supports these speeds, a lab experiment.
On the CPU side, it should be added that their memory interfaces are supposed to operate at certain speeds. If, for example, a processor’s RAM controller is operating at 4.8 GHz, it will communicate at that speed with the RAM although it can achieve higher speeds. Eliminates the benefit of having much faster memory.
The limits to achieve this
Today, data transmission has become a bigger problem for engineers than data processing or storage. Thanks to T-FORCE, we know that DDR5 can reach 2.6V, which would allow it to reach high clock frequencies. The problem? Power consumption grows exponentially with voltage as shown in the graph and this is always needed to increase clock speed.
Because what a 10 GHz DDR5 can mean a very high power consumption in data transfer, much more than what developed memory interfaces can support. And with memory interfaces, we are not only referring to the part of RAM, but also to the different processors that use it.
DDR5 is not designed for the high bandwidths of VRAM, for this there are other memories such as GDDR6, which are designed for higher bandwidth but in exchange for higher access latency . We don’t know how a 10 GHz DDR5 would affect its latency and therefore the performance of some instructions could be negatively affected despite the higher bandwidth.
