NV-DIMM memory modules have the peculiarity of having inside non-volatile RAM or NAND Flash, among which stands out the NVDIMM-P, which is based on the placement of RAM and memory NAND flash in a single DIMM, sharing bus memory with it. Well, AMD will adopt NVDIMM-P memory in future processors and APUs. We explain how they will implement it on their hardware.
One of the future improvements that we are going to see in both the CPU, GPU and APU is the integration of the flash controller into the processor as happened in his time with the RAM memory controller. This, in combination with the Compute Express Link or CXL interface, a variant of PCI Express 5.0, will allow joint communication with NAND Flash memory and system RAM. So in the future we will have memory modules that will integrate memory and storage into a single module.
We know that we will have NVDIMMs which combine the DDR5 memory with NAND FLASH memory in a single DIMM. Communication with the processor can be done via a PCIe 5.0 interface. Let’s not forget that Samsung recently introduced DDR5 memory expansion for one port PCIe with CXL interface. Could DDR modules disappear in favor of PCIe interfaces? Well, AMD has thought about that possibility for the future.
AMD will implement NVDIMM-P interfaces in its future processors
The source of this news is nothing more than AMD itself, in particular a patent titled ERROR REPORT FOR NON-VOLATILE MEMORY MODULES
In the description of said patent we can read the following:
Computer systems commonly use high density random access memory (DRAM) chips as main memory. Most DRAM chips sold today are compatible with various DDR standards promulgated by the Joint Electron Devices Engineering Council (JEDEC). DDR memory controllers are used to manage the interface between different agents (accessing these memories) and DDR DRAMs in accordance with published DDR standards.
A dual inline non-volatile memory module with persistent storage (“NVDIMM-P”) is a type of storage memory that is used in place of standard DDR DIMMs, but includes persistent memory. However, these memories contain different types of error conditions that differ from DDR error conditions. Additionally, the error conditions associated with NVDIMM-P have different error effects on the operating system running processes that use memory than the error conditions associated with DDR DIMMs.
The patent therefore confirms that AMD has developed a way to use this type of memory modules in your future processors. At the moment, we do not know in which generation it will be released. But if we show logic it is clear that a future AMD EPYC 7004 based on the Zen 4 architecture could be a good candidate for the use of this type of memory.
